CPU Processor Power Management Verification Engineer Job at Apple Inc., Santa Clara, CA

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  • Apple Inc.
  • Santa Clara, CA

Job Description

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! In this highly visible role, you will be at the center of a chip design effort collaborating with many teams, with a critical impact on getting functional products to millions of customers quickly. We are looking for a strong candidate to join our processor verification team focusing on Power Management and Clock Control verification.

Description

As a Processor Power Management Verification Engineer, you will have the responsibilities as follows: • Work closely with architecture and RTL designers on verifying the functionality correctness of the Power Management and Clock Control logic • Develop and execute test plans and schedules for the power management and clock control logic • Develop tests in Assembly, Scripts, System Verilog, or vectors according to test plans to drive testing in simulation and emulation environments • Root cause failures and propose potential solution to the design team • Work with silicon bringup team on developing tests that work in the emulation and FPGA environments. Aid silicon debug in related part of the design • Develop coverage monitors and analyze coverage to ensure all the test cases in the test plans are covered • Develop checkers or Verilog/System Verilog-base transactor to verify the design • Write assertions and apply formal verification to the design

Minimum Qualifications

  • Minimum BS and 3+ years of relevant industry experience
  • Experience with digital logic, micro-processor architecture, or power management architecture
  • Experience with digital design verification including knowledge of Verilog/System-Verilog based testbenches, transactors checkers
  • Programming skills include scripting languages such as Perl or Python

Key Qualifications

Preferred Qualifications

  • Master’s degree preferred
  • Experience in processor or power management architecture and verification
  • In-depth knowledge in design verification environments like random constraint verification and/or UVM base testbenches
  • Experience in system Verilog assertions or silicon bringup or UPF and low power simulation
  • Experience with advanced verification techniques such as formal verification is a plus
  • Advanced programming skills such as object orientated programming or CPU assembly language is a plus
  • Should be an extraordinary teammate with excellent communication skills with the ability to articulate complex design issues during verification effort
  • Be able to create and follow detailed work schedules and work independently on the verification efforts for a block/area of the design

Education & Experience

Additional Requirements

Pay & Benefits

  • At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 and $264,200, and your base pay will depend on your skills, qualifications, experience, and location.

    Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

    Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
As a Processor Power Management Verification Engineer, you will have the responsibilities as follows: • Work closely with architecture and RTL designers on verifying the functionality correctness of the Power Management and Clock Control logic • Develop and execute test plans and schedules for the power management and clock control logic • Develop tests in Assembly, Scripts, System Verilog, or vectors according to test plans to drive testing in simulation and emulation environments • Root cause failures and propose potential solution to the design team • Work with silicon bringup team on developing tests that work in the emulation and FPGA environments. Aid silicon debug in related part of the design • Develop coverage monitors and analyze coverage to ensure all the test cases in the test plans are covered • Develop checkers or Verilog/System Verilog-base transactor to verify the design • Write assertions and apply formal verification to the design

Job Tags

Relocation,

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